memory cell array meaning in English

存储单元陈列
存储器存储单元阵列

Then , memory cell array and some parts of peripheral circuits used in sram , for example , sense amplifyier and adderss decoder , are designed and verifyied by simulation . furthermore , some novel methods , such as clocked hierarchical word decoding structure , multi - stage sense amplifyier , common data line and data bus equlibruim technology has been applied in the design of 128kbit and imbit sram . what ' s more , we have studied compiler technology applied in the designing course of a imbit full cmos sram from the pointview of methology
然后对sram的存储单元电路以及外围电路中的灵敏放大器和地址译码器进行了设计和模拟，在此基础上，以128kb和1mb全cmossram设计为例，从方法学角度对同步sram设计中的带时钟分等级字线译码，多级灵敏放大和位线及总线平衡等技术进行了研究，并给出了相应的compiler算法。